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GM Interface An Overview Of The

Common system interface (CSI) is designed to be able to integrate memory controllers and distributed Shared memory."From Tukwila, Itanium processor and Nehalem - a 1 of paragraph 1, launched in 2008 with the kernel of micro architecture enhanced derived processor - start, universal system interface (CSI) is expected could be used for almost all the Intel system of the internal structure of the future

General system interface overview:

QuickPath code

QuickPath's previously published code name is the generic system interface (CSI), and its most important feature is the deployment of scalable Shared memory.The previous approach was to use a single memory Shared pool and connect to all processors in the server or high-end workstation through the FSB and the memory controller backbone.Unlike this, each processor in the QuickPath architecture has dedicated memory, which is accessed directly through the processor's integrated memory controller.If a processor needs to access dedicated memory on another processor, it can be accessed by connecting to a high-speed QuickPath that is connected to all processors.Using point-to-point interconnect mode, the processor does not have to contend with one bus for memory and I/O, thereby increasing scalability.

QuickPath interconnect throughput reflects its value in the server/workstation market QuickPath interconnect used as high as 6.4 GT/s link, provide the total bandwidth of up to 25 gb/s, the use of other interconnection solution 3 times higher.The QuickPath interconnection reduces the amount of traffic required for multiplexer interfaces, speeds up the transmission of payloads, and shows RAS features such as reliability, availability, and maintainability.

Most of Nehalem's microarchitecture design is still along with the Yorkfield and Wolfdale, and has the original four core design.One of the most notable innovations is its Quickpath structure.Nehalem will give up the FSB design and adopt the new Quick Path Interconnect architecture. Nehalem is Intel's first processor product using the Quickpath interconnection architecture.

QuickPath has a second component.The first part is the internal building group of the memory controller, and the integrated memory controller can shorten the delay of data transmission between the processor and main memory.The second part is a direct connection between the processor technology, the chip can share data, and under the multiprocessor homework, each processor can transmit information to each other, do not need chipset, so as to boost the overall system performance.Intel's second largest chip series, the mainstream x86 and high-end servers, will use QuickPath technology.

Instead of using the FSB design, use the Quick Path Interconnect technology to connect point-to-point transmission.The speed of QuickPath is tentatively fixed at 6.4 GT/s, and its transmission rate is 5 times that of the FSB 1333MHz, and the two-way maximum speed of 10.8 GT/s is higher than that of AMD

The Nehalem microarchitecture supports the Quick Path multi-path server environment of 4 processors, and at least the 4Ways server architecture that can be directly interchangeable with the data of at least four processors.Single chip, a maximum of 2, 4 and 8 core, the improved the Hyper - Theading support technology, makes the single processor can support 16 Threads, and Nehalem architecture Havendale also will be built in the drawing core, don't let AMD Fusion processor sole providence.SSE4.2 instruction set and ATA instruction set will also improve the performance of the system.

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